The various features, structures and/or attributes of an integrated circuit (IC) are regularly textually described in various types of documentation. For example, various descriptive documents may be used to profess the merits and/or benefits of an IC over prior versions thereof or over a competitor's product. Examples of such descriptive documents may include, but are not limited to, marketing materials, ad campaigns, user manuals and technical specifications, purchase and/or manufacturing agreements, research and development progress reports, intellectual property documents, and the like.
In certain situations, it may become useful or necessary to evaluate the validity of such assertions, or again to investigate whether a competing product also exhibits similar attributes. For instance, a manufacturer's claims to a specific IC characteristic may be questioned for compliance with one or more performance standards or product accreditations, or again verified in the context of a quality control procedure, or explored in competitive research. Alternatively, such characteristics may be the subject of a legal action, for instance in a matter relating to intellectual property associated with a given product. For example, a first party owning the rights to any IC having certain characteristics as defined by one or more patent claims may seek to investigate a competitor's product to assess whether there is infringement of these claims by the commercialization of this product. In this example, evidence is generally required of the use of the claimed subject matter, with such evidence generally being collected from one or more products that were acquired in the open market.
Following from the last example, the patents (or other descriptive documents as discussed above) in the field of microelectronics for which support is desired may claim particular circuits and/or structures. Often support for such claims is obtained using traditional reverse engineering means, as will be apparent to the skilled artisan, where circuitry and/or structural detail of an IC are “extracted” therefrom.
Techniques for extracting circuits from an IC will be apparent to the skilled artisan. In general, the circuit of interest generally has fewer than 10,000 gates. In such cases the circuit or circuits are extracted from the finished product (i.e. the circuits are derived from the physical layout of circuit elements on one or more layers of the IC), a schematic diagram is developed and a determination is made as to whether the schematic diagram provides for a circuit as claimed.
The techniques of de-layering and extracting circuits become more difficult when the circuit in question has more than the above number of gates. It is, however, the case that circuitry with such a number of gates is sufficient to provide for particular features of operation of the IC. Namely, the presence of this circuitry within an IC may provide for particular functionality of the IC.
There are therefore situations where support for claimed subject matter (or statements in other descriptive documentation as discussed above) cannot be readily derived using traditional methods of circuit extraction through reverse engineering. One particular example of such situations includes, but is not limited to, so-called system-level features of the operation of an IC. Namely, the determination of the system-level operation of an IC that is in a finished state becomes difficult if not impossible using conventional methods. Furthermore, while various benchmark testing procedures have been made available to compare the performance of similar ICs under different conditions, such tests do not allow for the observation of the system-level operation of such ICs, but rather, only provide observation as to the global performance of the IC under different operational loads. Accordingly, while one may determine that two ICs perform in a similar manner in different conditions, such testing procedures do not enable one to observe the system-level operation of the IC enabling such performance. In addition, traditional performance testing procedures are generally implemented using conventional operating systems wherein, in many cases, this operating system (OS) may mask the native operation thereof, thereby further obscuring the native system-level operations of interest.
There is therefore a need for a new IC characterisation system and method that overcomes some of the drawbacks of known techniques.